# What is a Full Subtractor

A full subtractor is a combinational digital circuit that is used to carry out subtraction involving three bits. This circuitry is then used in a cascade arrangement to synthesize multiple bit subtractor circuits. There are three input and two output bits that are involved in an nth bit full subtractor circuit and these are explained below:-

P(n), Q(n) – the two input bits with Q(n) being the subtrahend bit.

B(n) – The input borrow bit that signifies the borrow taken by the bits of lesser significance from the A(n) bit. This bit is generated in the n-1 stage of subtraction.

D(n) – The output difference bit

B(n+1) – The output borrow bit that signifies the borrow taken by this stage from the next significant bit. This bit is an input to the n+1 stage of subtraction.

To design a full subtractor circuit, one needs to know how binary subtraction works. From that knowledge, the following truth table can be devised for a full subtractor circuit:-

Inputs

Outputs

P(n)

Q(n)

B(n)

D(n)

B(n+1)

0

0

0

0

0

0

0

1

1

1

0

1

0

1

1

0

1

1

0

1

1

0

0

1

0

1

0

1

0

0

1

1

0

0

0

1

1

1

1

1

Using the K-Map or Boolean algebra technique, the following logical functional equations relating the output bits to the input bits can be obtained:-

D(n) = P(n) ex-OR Q(n) ex-OR B(n)

B(n+1) = P(n)’.B(n) + P(n)’.Q(n) + Q(n).(B(n)

The above logical circuit can thus be synthesized by using two 2-input ex-OR gates, three 2-input AND gates and one 3-input OR gate along with two inverter gates. In multi-bit subtraction, the various difference output bits along with the Borrow out bit from the most significant bits’s full subtractor is available to the user. The magnitude of the result is shown by the difference bits while its sign is shown by the Borrow out bit. If this bit is then the result is negative and if it is then the result is a positive one.

Due to the propagation delay in the borrow bits that are travelling between successive stages, this cascaded system of multiple bit subtraction suffers in terms of speed. A look ahead borrow logic is one of the substitutes that can be used if more speed is required. But if design simplicity and modularity is desired, then a cascaded full adder arrangement works the best.